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HD74LS253
Dual 4-line-to-1-line Data Selectors / Multiplexers (with three-state outputs)
REJ03D0468-0300 Rev.3.00 Jul.15.2005 This data selector / multiplexer contains inverters and drivers to supply fully complementary, on-ship, binary decoding data selection to AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at highimpedance state) the low-impedance of the single enabled output will drive the bus line to a high or low logic level.
Features
* Ordering Information
Part Name HD74LS253P HD74LS253FPEL Package Type DILP-16 pin SOP-16 pin (JEITA) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) Package Abbreviation P FP Taping Abbreviation (Quantity) -- EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Output Control 1G Select B 1C3 Data Inputs 1C2 1C1 1C0 Output 1Y GND
1 2 3 4 5 6 7 8
1G 1C3 1C2 1C1 B B 1C0 A A 1Y 2G 2C3 B 2C2 B A 2C1 A 2C0 2Y
16 15 14 13 12 11 10 9
VCC Output 2G Control Select A 2C3 2C2 2C1 2C0 2Y Output Data Inputs
(Top view)
Rev.3.00, Jul.15.2005, page 1 of 5
HD74LS253
Function Table
Select inputs B X L L L L H H H H A X L L H H L L H H C0 X L H X X X X X X C1 X X X L H X X X X Data inputs C2 X X X X X L H X X C3 X X X X X X X L H Output control G H L L L L L L L L Output Y Z L H L H L H L H
Notes: 1. H; high level, L; low level, X; irrelevant 2. Address inputs A and B are common to both sections.
Block Diagram
Output Control 1G 1C0 1C1 Data 1 1C2 1C3 B Select A 2C0 2C1 Data 2 2C2 2C3 Output Control 2G Output 2Y Output 1Y
Absolute Maximum Ratings
Item Supply voltage Input voltage Output voltage (off-state) Operating temperature Power dissipation Storage temperature Symbol VCC VIN VO (off) Topr PT Tstg Ratings 7 7 5.5 -20 to +75 400 -65 to +150 Unit V V V C mW C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Rev.3.00, Jul.15.2005, page 2 of 5
HD74LS253
Recommended Operating Conditions
Item Supply voltage Output current Operating temperature Symbol VCC IOH IOL Topr Min 4.75 -- -- -20 Typ 5.00 -- -- 25 Max 5.25 -2.6 8 75 Unit V mA mA C
Electrical Characteristics
(Ta = -20 to +75 C)
Item Input voltage Symbol VIH VIL VOH Output voltage VOL IIH IIL II Output current Short-circuit output current Supply current** IOZ IOS ICC min. 2.0 -- 2.4 -- -- -- -- -- -- -- -30 -- -- -- typ.* -- -- -- -- -- -- -- -- -- -- -- 7 8.5 -- max. -- 0.8 -- 0.4 0.5 20 -0.4 0.1 20 -20 -130 12 14 -1.5 Unit V V V V A mA mA A mA mA Condition
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = -2.6 mA IOL = 4 mA VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V IOL = 8 mA VCC = 5.25 V, VI = 2.7 V VCC = 5.25 V, VI = 0.4 V VCC = 5.25 V, VI = 7 V VO = 2.7 V VO = 0.4 V VCC = 5.25 V Condition A VCC = 5.25 V Condition B VCC = 4.75 V, IIN = -18 mA VCC = 5.25 V, VIH = 2 V
Input current
Input clamp voltage VIK V Notes: * VCC = 5 V, Ta = 25C ** ICC is measured with the outputs open under the following conditions. A; All inputs grounded, B; Output control at 4.5 V, all inputs grounded.
Switching Characteristics
(VCC = 5 V, Ta = 25C)
Item Symbol tPLH tPHL tPLH tPHL tZH tZL tHZ tLZ Inputs Data Select Output Control Output Control Output Y Y Y Y min. -- -- -- -- -- -- -- -- typ. 17 13 30 21 15 15 27 18 max. 25 20 45 32 28 23 41 27 Unit Condition
Propagation delay time
ns
CL = 15 pF, RL = 2 k
Output enable time Output disable time
ns ns CL = 5 pF, RL = 2 k
Rev.3.00, Jul.15.2005, page 3 of 5
HD74LS253
Testing Method
Test Circuit
VCC 4.5V G RL Output Y 5k CL S1
Input P.G. Zout = 50
See Function Table
C0 C1 C2 C3 A B
S2
Notes:
1. CL includes probe and jig capacitance. 2. All diodes are 1S2074(H).
Waveform
tTHL Output Control 90% 1.3V 3V 10% tZL 4.5V Waveform 1
S1 closed, S2 open
tTLH 90% 1.3V 3V 0V tLZ
S1 and, S2 closed
0V
10%
1.3V VOL tHZ VOH 0.5V
1.5V VOL VOH 1.5V
tZH Waveform 2
S1 open, S2 closed
1.3V 0V
0.5V
S1 and, S2 closed
Notes:
1. Input pulse; tTLH 15 ns, tTHL 6 ns, PRR = 1 MHz, duty cycle = 50% 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
Rev.3.00, Jul.15.2005, page 4 of 5
HD74LS253
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
E
A1
A
Reference Symbol
Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 1.12 2.54 0.56 Max
e D E
L
1
A A1
e
bp
e1
b c b c
p 3
e Z ( Ni/Pd/Au plating ) L
JEITA Package Code P-SOP16-5.5x10.06-1.27
RENESAS Code PRSP0016DH-B
Previous Code FP-16DAV
MASS[Typ.] 0.24g
*1
D F 9
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
Reference Symbol
*2
c
Dimension in Millimeters Min Nom 10.06 5.50 Max 10.5
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
D E A2
8 bp x M L1
A1 A bp b1 c
0.00
0.10
0.20 2.20
0.34
0.40
0.46
0.15
1
0.20
0.25
A
c
HE
0 7.50 7.80 1.27
8 8.00
A1
y L
e x y
0.12 0.15 0.80 0.50
1
Detail F
Z L L 0.70 1.15
0.90
Rev.3.00, Jul.15.2005, page 5 of 5
Sales Strategic Planning Div.
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